IMPACT OF PRE-CONDITIONING, VOLTAGE BIAS AND TEMPERATURE ON RELIABILITY OF PLASTIC ENCAPSULATED MICROCIRCUITS
Microelectronics and Reliability (to be published)
P. SHARMA, K. UPADHYAYULA, L. LANTZ, and M. PECHT
CALCE Electronic Packaging Research Center
University of Maryland, College Park, MD 20742
http://www.calce.umd.edu
Abstract
This paper investigates the effect of pre-conditioning, voltage bias and test temperature on the reliability of DIP and SOIC packages, molded with four different epoxy compounds, which were subjected to accelerated test conditions.