ABSTRACT

Multi-layer organic laminates used in printed wiring boards and laminated multichip modules (MCM-L) can develop a loss of insulation resistance between two traces, between a trace and a via, and between two vias, due to the growth of conductive filaments along he epoxy resin/glass interface. The growth of the filaments is a function of temperature, humidity, voltage, laminate material, manufacturing processes and the geometry and spacing of the conductors.

In order to develop a model which can be used to establish both design guidelines for the prevention of conductive filament formation, and tests for product qualification, a design of experiments study was conducted. Temperature, humidity, and voltage were the stress parameters, and conductor spacing, conductor geometry, laminate material (FR-4, BT and CE) and surface coating (presence and absence of solder mask, solder plate, and post coat) were the laminate parameters. The experimental approach, the analyses of results, and a model for time-to-failure due to conductive filament formation which unifies this study with previous studies, are presented in this paper.