Created: 8/12/96 Updated: 11/18/96

CALCE News

August 1996

INDEX



CALCE EPRC Efforts in High-Temperature Electronics

The development of electronics that can operate at elevated temperatures has been identified as a critical technology for the next century, and initiatives in this area are currently being pursued by many avionics and automotive electronics companies and their suppliers. Traditional limitations on the operation of electronic devices at temperatures above 125ºC hinder the development of distributed control systems, smart sensors, and remote actuators, and increase the cost of electronic systems used to monitor automotive, aerospace, and chemical process environments. The costs are a result of the additional size, weight, expense and reliability risks related to remote placement or cooling of these assemblies.

Advances in the design and manufacture of electronic components have made it possible to develop electronic systems that will operate reliably above the traditional temperature limits. However, successful development efforts hinge on a firm understanding of the issues related to semiconductor physics and device processing, materials selection, package design, and thermal management. The faculty of the CALCE Electronic Packaging Research Center (EPRC) have conducted extensive research on these topics, which will culminate in the publication of the first text of high- temperature electronics to address these issues.

This existing knowledge base, combined with the latest analytical and modeling capability and the world's only physics-of-failure based electronic packaging design-for-reliability toolset, makes the CALCE EPRC uniquely qualified to perform analyses and evaluations of electronic systems for use at elevated temperatures. In fact, the CALCE EPRC was recently chosen to conduct all the elevated temperature reliability assessment involved in the development of the first commercially available 225ºC distributed control systems an effort supported by ARPA and fourteen major industrial participants, including United Technologies, AlliedSignal, Honeywell, Boeing, Parker, Moog, Rockwell, and Ford.

The CALCE EPRC has developed an approach to analyzing electronic subsystems for use at elevated temperatures that has been utilized in assessing the viability of a number of different modules for Boeing, Delco, Honeywell, Eldec, AMP, and other members. Those wishing further information should contact Dr. Patrick McCluskey at (301) 405-0047.

CALCE EPRC Receives NCMS Award to Study Lead-free Solders

The CALCE EPRC has been awarded a contract to develop life prediction models for lead-free solder alloys for the National Center for Manufacturing Sciences, (NCMS).

The objective of this study is to develop models for four lead-free solder materials based on data provided by NCMS from temperature cycling tests of 44-pin PLCC component assemblies. The CALCE EPRC will evaluate the thermo-mechanical durability of these materials using an energy-partitioning approach: CALCE's standard method of analysis includes studies of this nature. The model parameters for implementing the energy-partitioning model will be evaluated for all materials using the NMCS experimental data.

Deliverables for this project include software designed to perform the reliability analysis of these lead-free solders, as well as a database containing these new alloy material properties. Included will be the results of all finite element analyses used to evaluate model parameters. Also, all supporting equations and supplementary information required to explain the energy-partitioning model will be noted.

For more information please contact Dr. A. Dasgupta at (301) 405-5251.

CALCE Optoelectronics Group Now Focusing on Adhesive Epoxies for Fiber Optic Applications

After a series of meetings between CALCE faculty member Dr. Patricia Mead and representatives from Tra-Con, Incorporated (Medford, MA), the Naval Surface Warfare Center (Dahlgren, VA) and Bellcore (Morristown, NJ), the core project in fiber optic connector reliability (FOC) is now focusing on characterizing the role of adhesive epoxies in FOC reliability. Industry-wide concern in this area was also expressed at the Telecommunications Industry Association (TIA) Committee Meeting on Fiber Optics held this past June in Quebec City, Quebec.

A collaboration with adhesives producers, connector manufacturers, and an end-user organization has been cultivated and a combination of three experimental procedures has been developed, including (1) measurement of fiber cable expansion/contraction chara cteristics during environmental cycling, (2) measurement of fiber cable stresses using a unique intrinsic fiber-sensor technique currently being developed by the CALCE Optoelectronics group, and (3) characterization of currently available adhesive epoxy m aterial parameters. A finite element analysis of the termination subassembly within a MIL-28876C FOC has also been initiated in parallel with our experimental activities. Available results of these studies will be presented at the annual CALCE meetings this coming October. TRW (Sunnyvale, CA) and GEC-Marconi are supporting this work.

Ruggedization of Laptop Computers for Mobile Applications

Portable computers provide the capability to access, retrieve, and store vast amounts of information, both locally as well as with other host systems, through wireless LANs and modems.

CALCE has worked to develop and bring to market a ruggedized mobile computing system, which is not only cost-effective, but also adds less than 20% to the weight and form factor of the originally manufactured equipment (OEM). The entire design cycle for this system was accomplished in a few months so as not to miss the optimum market window.

The ruggedization equipment will be mounted in the vehicle and be detachable for use outside the vehicle. It must have the capability to allow the OEM to withstand rain, dust, dirt, and spills in the keyboard; leakage through other openings; drops and sh ock loads; road vibrations; and extreme temperature variations.

A large segment of the portable computer market can be captured by ruggedizing versions of extremely popular and market-accepted IBM products to environmental survival characteristics, which exceed those of products currently available.

Currently, the IBM 730T and IBM 365 units are being experimentally ruggedized, and these attempts will be followed with further attempts on a series of other IBM computers and peripheral devices.

The key steps in the approach to ruggedize the 730T pen-based computer and the 365 laptop were to (1) perform simulation and early laboratory environmental testing on the unruggedized products to identify critical design issues for each product; (2) asses s various packaging options to develop a conceptual design capable of accommodating future IBM products not yet released; (3) turn the conceptual design into a final design for production; (4) conduct the necessary accelerated life tests on the final prot otype to validate the reliability of the final design; and (5) quantify the warranty risks.

The work accomplished, so far, has been to conduct thermal life testing (still in progress) on the ruggedized 730T units. Additionally, population reliability predictions were determined using a Chi-square distribution. Also, a conducted accelerated life vibration test is being done on 730Ts using scaled PSD profiles of rough road conditions to determine survivability. The results of these tests have fallen within one standard deviation of the mean. Further tests were done to determine the impact isolation characteristics of different boot materials for the 730Ts by subjecting them to various drop loads in order to identify and address all critical design issues for the 365 laptop. Additionally, a completed final design layout for the ruggedized unit that addressed all manufacturability issues was decided upon. For further information contact Dr. Donald Barker at (301) 405-5264.

Electronics Products and Reliability (EPAR) Study Program for M.S. and Ph.D.s

The rapid research and technology advances taking place in electronics packaging and product development must permeate in a timely fashion into the engineering education curricula, in order to provide a pool of qualified engineers to the industry in the coming years. This must be achieved through systematically transferring "just-in-time" state-of-the-art knowledge and exposure to ongoing research activities to the student population about to enter the industry. Due to the strongly interdisciplinary nature of electronic packaging, traditional engineering curricula do not include a well- structured academic program to cover these topics. With over $2M of Technology Reinvestment Program (TRP) funds, advice, and support from the CALCE EPRC industry members and support by the University of Maryland to revamp the curriculum, a new undergraduate and a graduate educational program in electronic products and reliability (EPAR) are now available.

The EPAR program addresses the generic areas critical for attaining more cost-effective and reliable electronic products. A wide range of dedicated and cross-disciplinary courses are complemented by extensive computer systems and laboratory facilities.

A framework of coursework, examinations, and research projects leading to M.S. and Ph.D. degrees is being put in place. In order to meet the coursework requirements for these degrees, introductory and specialized courses have been developed at three levels . The first-level core courses serve as the entry points into the graduate program. More focused courses are offered at the second and third levels. Students in the EPAR program are generally required to take half of the academic credits from these courses.

Support from two TRP awards has been utilized in developing five graduate courses: Opto-electronic Packaging and Reliability, Plastic Encapsulated Microelectronics, Surface Mount Manufacturing, Packaging Issues for Extreme Temperature Electronics and Ther mal Management in Electronic Packaging. In addition, an undergraduate course on Introduction to Electronic Packaging Materials was also developed. All courses included guest lectures from industry experts. In addition to the courses, two textbooks have be en written under the TRP funding in the area of high-temperature electronics. The TRP sponsorship during the coming year will be used to develop a number of multi-media educational modules in support of the EPAR curriculum.

Graduates from the EPAR program have been extremely successful in the job market. This year alone, twenty-two MS and six Ph.D. degrees were awarded and all of these students have obtained jobs in the U.S. electronics industry, with M.S. and Ph.D. starting salaries averaging $50K and $65K, respectively.

For more information, please contact CALCE EPSC.

Contact and Connector Studies

Cost and density have a significant impact on the way reliable connectors are designed. Connectors can no longer rely on thick layers of gold plating and stiff contact springs to maintain a stable, low-resistance electrical connection. With typical normal forces currently below 100 grams, the interactions between the major contact design parameters must be known to optimize the design of reliable, cost-effective connectors.

Research performed at the CALCE EPRC has focused on identifying the significant effects and interactions of the following electric contact design parameters: normal force, contact geometry, gold plating thickness, mixed flowing gas exposure, and wipe at the contact interface on nickel- and gold-plated contact finishes. To collect the data necessary for this research, an automated contact resistance probe (ACRP) was developed. This instrument enables contact resistance measurements to be made on small anomalies on contact surfaces, such as corroded pore sites and dust particles, with the help of video targeting algorithms. In addition to the CALCE EPRC core research, the ACRP has been used in contract projects for AT&T Bell Laboratories and Medtest Systems.

Specific results of our research can be categorized into electrical contact to nickel surfaces, electrical contact to pore-corroded gold surfaces, characterization of the occurrence of corroded pores, and a simulation of making contact to a pore-corroded surface.

Electrical Contact to Nickel Surfaces
The effects of wipe and backwipe on nickel-plated contact surfaces exposed to the Battelle class II MFG environment were examined. While nickel contact finishes generally do not have low contact resistance properties after exposure to corrosive environments, the addition of small amounts of wipe significantly decreased the contact resistance. There appears to be a minimal length of wipe after which little decrease in resistance was noted. Wipes in the opposite direction (backwipe) were shown to further decrease the contact resistance. The beneficial effect of backwipe is of special interest since it has not been seen in softer contact materials such as copper and gold. These results indicate that for connectors that must employ a nickel contact finish, both wipe and backwipe should be incorporated into the design for reliable performance.

Electrical Contact to Pore Corroded Gold Surfaces
The prevalent form of contact corrosion in light industrial environments is pore corrosion, which causes discrete mounds of corrosion randomly distributed on the contact finish. Contact on or off of these corroded pore sites was found to be a very signifi cant variable affecting the contact resistance. Contact resistance measurements made in the "clean" area directly outside corroded pore sites produced contact resistance values only slightly higher than those from clean gold-plated coupons. Wipe in these areas reduced the contact resistance, but backwipe had no effect. Readings made just inside the edge of a corroded pore gave contact resistance measurements te ns to hundreds of milliohms higher than those on clean gold. Readings made in center areas of corroded pores produced very high contact resistance measurements, many of which were open circuit. Wipe and backwipe were not effective in reducing the contact resistance when the probe landed on corroded pore sites.

These results show that as long as electrical contact is not made on a corroded pore, the contact resistance will be low. Important design implications are that low contact resistance is independent of the gold-plating thickness and exposure to the corro sive environment, and that the overall reliability of the gold contact surface is significantly impacted by the size and number of corroded pores on the surface.

Porosity Characterization
Since the occurrence of pore corrosion has such a significant effect on the contact resistance properties of a gold-plated finish, a method of characterizing the corrosion is necessary. Current methods in industry typically employ counting schemes where t he number of corroded pores in a control area are tabulated. A more quantitative method of porosity characterization was developed by which the actual area of the finish covered by pore corrosion was measured using image processing hardware. Using this me thod, relationships were developed for the percent area covered by pore corrosion as a function of gold-plating thickness and MFG exposure time. A benefit of this approach is that not only is the severity of the pore corrosion determined, but the result c an be used to estimate the probability that contact would be made on or off a corroded pore site as a function of gold-plating thickness and MFG exposure time.

Contact Simulation
The results of the porosity evaluation and the contact resistance testing in both the on and off pore cases were combined to provide an estimate of the contact resistance of a pore-corroded gold surface. Monte Carlo techniques were used to simulate a "bli nd land" on a pore-corroded gold surface. The porosity characterization results were used to determine whether contact is made on or off a corroded pore site. The contact resistance was then estimated using proper test distribution, depending on the simul ation inputs. This algorithm was iterated until a stable profile was developed. In this manner, a simulation of contacting to pore-corroded gold contact-surfaces can be conducted with normal force, geometry, wipe, gold-plating thickness and MFG exposure t ime as inputs.

For more information, please contact Dr. Michael Pecht at (301) 405-5323.

Release of New calcePWA 1.3 Software

The latest version of the CALCE EPRC "calcePWA" design assessment software for circuit card assemblies was released in April. The calcePWA toolset provides users the ability to model and analyze circuit card assemblies under thermal and mechanical loads a s well as to perform physics-of-failure evaluations. This year, the physics-of-failure evaluation has been extended to include conductive filament formation. In addition, enhancements and updates have been included to improve fatigue analysis reports, lea d modeling capabilities, tabular views of material and component information, design locking, the HTML online help system, and advance editing capabilities for CCA modeling. Previously, it could import designs from Mentor's BoardStation and Protel's Adva nced PCB Design System; this year the import capability is being extended to include design files from the PADS PWB Layout System. In addition, the import method has been developed for design files from the RECAL/REDAC PCB system.

This new software has already seen action in a variety of systems. It has been used to evaluate circuit card assemblies for communication systems such as the Joint STARS Communication system, Smart-T Radio System, and the AVR system for the B2. It has bee n used to model cards in a variety of radar systems, as well as various avionics PWB cards for the F-22. Saturn Corporation has been using the software as a prescreen on the design and test of an instrument control cluster board for one of their new cars. The software is being used to evaluate three cards in the ARC-210 transceiver system developed by Collins Avionics and Communication Division, CALCE EPRC, and the U.S. Army. In addition, Texas Instruments has licensed portions of the software for usage i n their CARMA product, and also markets a commercialized CALCE version of C-CALCE. And finally, the U.S. Army AMSAA plans to use the software to evaluate a total of twelve CCAs, and Rockwell CSD is using the calcePWA toolset to redesign and qualify the BI U card for its high-frequency radio.

In addition to the calcePWA toolkit, CALCE EPRC is pleased to announce the beta release of calceCFD, a new software package capable of predicting thermal, fluid flow, and pressure fields within a convection-cooled three-dimensional rectangular enclosure. CalceCFD is a computational fluid dynamics (CFD) based algorithm particularly suited for thermal analysis of electrical/electronic enclosures. The calceCFD tool was developed under the direction of Dr. Yogi Joshi and was used this year by University of Ma ryland graduate students to model various electronic enclosures.

The calcePWA software is currently available to members of the CALCE. In addition, a portion of the software has been licensed to Texas Instruments for use in their CARMA product. For more information on the calcePWA software contact Dr. Michael Osterman at (301) 405-8023. For information about calce-CFD contact CALCE EPSC. For information on the Texas Instruments CARMA and C-CALCE product contact Keith Janasek at (214) 997-5970.

New Equipment Acquisitions

CALCE has acquired new equipment to broaden our state-of-the-art capability.

  1. An Isthmus Dynamic Hygro-thermal Mechanical Analyzer is used to conduct in-site measurements of the relative humidity and temperature dependence of mechanical properties of thin-film materials and the effect of these parameters on damage behavior under various environmental and loading conditions.
  2. The Micro-Quad 8000 Fully Digital Microprocessor-based Infrared Moisture Analyzer allows sophisticated data manipulation, and an integral printer provides hard copy data. It also features an RS232C interface port and multiple LED displays.
  3. The Electrical Test Equipment-Tektronix S-3270 128 pin digital electrical test equipment is capable of testing the functionality of TTL, ECL, CMOS devices, and microprocessors. Its DC capabilities range from 100V to 100mV and 450mA to a few nA.
  4. The Keithley Electrometer/High Resistance Meter Model 6517 is able to perform leakage, breakdown, and resistance testing, as well as volume (ohm-cm) and surface resistivity (ohm/square) measurements on insulating materials.
  5. The Keithley LCZ Meter Model 3322 provides precision component and circuit testing with test frequencies up to 100kHz.
  6. The Dynamic Burn-in System is designed to test microprocessors and memories under dynamic operational conditions. The system is configured to use fifty-two Universal burn-in boards and has the flexibility to dynamically exercise most devices without hardware changes.

Electronic Packaging Manufacturing Lab

The CALCE EPRC now has a full service manufacturing facility called the CALCE EPRC Electronic Packaging Manufacturing Lab. To process development and optimization in SMT manufacturing, our facility is conducting research and performing experiments on all electronic produc ts and their associated processes. With our fully equipped manufacturing lab we are equipped and staffed to engineer electronic products from concept through test. The lab is equipped to deposit solder paste by stencil, screen, or by syringe manually, semi -automatically, or fully automatically. In addition, the lab is equipped for pick and place, reflow both automatically and manually, inspection, rework and repair, statistical process control, training in manufacturing processes, and a complete library o f electronic manufacturing supplemented by a decade of IPC specifications and standards.

For further information, contact Dr. Abhijit Dasgupta at: (301) 405-5251 or e-mail dasgupta@eng.umd.edu.

MEMs-Based Packaging

The CALCE Electronic Packaging Manufacturing Lab has entered the field of MEMs-based electronic packaging. After the successful disposition of a conductive epoxy in .006" dots on four hundred micron pads, the manufacturing lab was chosen to assemble 30 MEMs-based ac celerometers for Optical E.T.C., Inc. of Huntsville, Alabama. Using the staff and equipment in the lab, thirty chip dies will be attached to thirty carriers using a conductive epoxy. Electrical performance will be observed during assembly. The assemblies will then be inspected. The packaging technique is unique and the manufacturing lab at CALCE is equipped and staffed to assemble, manufacture, inspect, and test the devices for product assurance and lifetime reliability.

Solder Paste Process Control

The CALCE Electronic Packaging Manufacturing Lab is now testing solder pastes that meet and exceed IPC's ANSI/J-STD-005 requirements. The lab has teamed with Marquette University and the California Polytechnic University, San Luis Obispo to do this u sing AC impedance spectroscopy. The EMPF of Indianapolis, Indiana is donating the use of an IS4000 to the Electronic Packaging Manufacturing Lab in order to do this.

Daewoo Scholars Visit CALCE

Daewoo and CALCE have developed a strong working relationship. Part of this relationship has manifested itself with the visit to CALCE of research engineer Jin Woo Kim from Daewoo Electronics, one of the largest electronics companies in South Korea. Mr. K im will spend six months at CALCE working on the design, manufacture, and reliability of electronic components. When he leaves, he will be replaced by another research engineer from Daewoo, Hee Jin Lee. Ms. Lee will also spend six months at CALCE, pursuin g the same line of research as Kim. This type of effort provides valuable experience to the two researchers, strengthens the working relationship between Daewoo and CALCE, allows mutually beneficial research to be done at the CALCE facility, and provides CALCE personnel with valuable experience from working with two of Daewoo's research engineers. This joint operation is just a furtherance of CALCE's desired goal to work with its member companies to further their research and development goals.

CALCE Students' Summer Cooperative Projects

Three CALCE EPRC students and member companies have spent a portion of their summer together. Jill Jordan, Prateek Dujari, and Damian Searls have worked on a regular, full-time basis for Honeywell, Eldec, and Texas Instruments, respectively. Each student has worked on a variety of projects. Jill has conducted temperature tests on a digital printed circuit and power supply board, worked on developing a plastic off-the-shelf connector, organized efforts with various companies to get electronics parts teste d and to develop a publication on screening techniques, and worked on a major problem concerning stress induced board-bending. Prateek is working on the development of a methodology to handle the accelerated stress testing of electronic systems. He is als o working on developing one for reliability enhancement testing. Damian is developing techniques to use CADMP methods in the virtual qualification of parts and the assessment of the reliability of plastic encapsulated microcircuits.

During the school semester these three students had already been working on member projects for these companies. This summer experience will provide both them and the companies an excellent opportunity to get to know each other better, possibly leading to future job opportunities.

Directed Studies in Critical Technologies Award

A fully funded government scholarship has been awarded to Leon Lantz to study key issues associated with the commercial insertion of plastic encapsulated microcircuits into high- reliability applications. Leon will be measuring ion diffusion rates in comm ercial molding compounds and assessing the correlation between ion diffusion rates and corrosion-related failures in PEMs.