Over the last 15 years, the CALCE Electronic Products and Systems
(EPSC) has invested over $50 million in developing methodologies,
models and tools that address the design, manufacture and analysis of
electronic products. CALCE EPSC is now recognized as a founder and
driving force behind the development and implementation of
physics-of-failure approaches to reliability and life cycle prediction,
as well as a world leader in accelerated testing, failure analysis,
electronic parts selection and management, and health and prognostics
assessment.
CALCE EPSC is currently at the forefront of international
standards development and chaired the development of IEEE 1413 and
1413.1 product reliability standards. The Center is building upon this
reliability standards leadership by developing an organization auditing
methodology called “Reliability Capability and Maturity
Assessment.?Reliability Capability and Maturity Assessment will aid
management assessment of an organization’s ability to design, develop
and manufacture reliable electronic products.
CALCE EPSC consists of over 30 faculty and staff, and world-class
simulation, failure analysis and test facilities. Over the last year,
the center conducted more than 200 reliability analysis investigations
and assessments for over 100 electronics companies, using its
expertise, state-of-the-art equipment, and virtual qualification and
reliability assessment software. In 1999, CALCE EPSC became the first
academic research facility in the world to be ISO 9001 certified. CALCE
researchers have authored over 25 internationally acclaimed textbooks
and developed an extensive set of web documents and tools.
The Center has expanded collaboration with NASA Jet Propulsion
Laboratory and Johns Hopkins University Applied Physics Laboratory in
the area of assessing feasibility of using chip-on-board technology
parts at very low temperatures (down to -120°C) and wide temperature
cycling (200°C range) applications. The work will also find
technological solutions to the identified roadblocks.
CALCE researchers defined the method of carefully uprating
commercial electronic parts beyond manufacturers?specified temperature
limits. Recently, they have further developed an uprateability risk
assessment process for electronic parts. This process provides a
probability for uprating success. It is based on metrics for both part
and system characteristics. The new uprateability risk assessment
process has been successfully applied to an avionics application, and
is currently being applied to a telecommunications system.
To understand the reliability of fielded hardware, CALCE EPSC
is designing health monitoring and prognostics software modules to
evaluate the remaining life of electronics. The health prediction is
based on in-situ condition monitoring and computing the accumulated
damage. Therefore, the remaining life can be predicted. This module
will be embedded into a health and usage monitoring system (HUMS) for
various applications.
If your organization is interested in utilizing CALCE EPSC expertise and resources, you can contact me directly via email or at 301-405-5323.
Michael Pecht
Chair Professor and Director
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The transition to lead-free assembly brings quality, reliability and
legal risks. Successful implementation of lead-free solder systems
requires that all three are satisfactorily mitigated. While many
studies have been conducted on quality and reliability issues, very
little attention has been paid to the patent landscape. This vacancy
can be explained in part by the common misconception that if an alloy
is available, it must also be legal. Since alloy compositions are known
to change during processing, habitual double-checking of intellectual
property for specific joining techniques and process-induced
compositional changes to the domain of other patents is advisable.
In recent years, the number of lead-free patents has been
growing, and has reached a point where timely and cost-effective
evaluations of patents for particular solder compositions are needed.
To combat this problem, CALCE has developed a lead-free IP management
software tool. The key elements of the patent management software are a
database containing patent information, and output files that contain
both graphs and extracts from patent texts.
With the capability to rapidly define key patents within any
alloy group, software-enhanced patent management can be used to
navigate around particularly broad patents, and help designers focus on
using solders that are either not showing up in recent patent
applications, or are defined in a way that restricts their synthesis,
as opposed to their use. Alternatively, it may be used to find
potentially invalid patents, to determine if an alloy infringes on a
patent, to conduct a preliminary evaluation of the legal risk
associated with using an alloy, or to simply keep track of all
lead-free alloy IP.
For more information on the patent management software, contact
Prof. Michael Pecht.
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Chris Wilkinson, Senior Research Scientist at the CALCE Center is
working with Lockheed Martin Aeronautics to develop a methodology for
measuring the amount of life remaining in electronic systems. To
advance the technology, Lockheed Martin awarded him a university grant
for $50,000 in April 2003. Together with ultrasonic sensor technology
inventor beezerBug, a start-up company in Mesa, AZ, he will be
investigating the use of ultrasonic signaling to communicate data
between a network of airframe-mounted environmental sensors and a
centrally located data recorder, using the airframe structure as a
transmission medium, thus avoiding the use of wired or radio-frequency
connections, which have several disadvantages.
The data collected will be used in prognostics and health
monitoring (ePHM) and life consumption monitoring of electronic
systems. The results from this work will be used to develop
condition-based maintenance methodologies for electronic systems which
should help to reduce the incidence of unscheduled removals.
For more information on this project, contact Chris Wilkinson at (301) 405-4563, or email chrisw@wam.umd.edu.
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For many types of electronic systems, recurring functional test is
an important driver that significantly affects the total cost of
manufacturing. For example, it is not uncommon that greater than 60% of
an electronic product’s recurring cost can be attributed to testing.
Understanding the test, diagnosis and rework costs may determine the
extent to which the system designer can control and optimize the
manufacturing cost, and the extent to which it makes sense to do so.
The ultimate goal of any functional test strategy is the
determination of 1) When should a system be tested? At what point(s) in
the manufacturing process? 2) How much testing should be done, i.e.,
how thorough should the test be? A test that detects 10% of the defects
in a product may cost a small fraction of a test that identifies 95% of
the defects, so, if there are multiple tests in a process, What is the
optimum fault coverage to buy for each one? 3) Should rework of
defective products be attempted and, if so, how many attempts should be
made to rework a specific instance of a product during manufacturing
before scrapping it? 4) How much time and money should be spent to make
the product more testable? These goals would be easy to realize if
unlimited time, resources, and money existed. One could stop after
every step in the manufacturing process and perform a full-function
test, adding structures to the system such that every critical element
could be accessed and tested. These measures are unfortunately far from
practical and we are usually faced with determining how to obtain the
best test coverage possible for the least cost.
CALCE EPSC has developed a new test, diagnosis, and rework
analysis model for use in manufacturing process modeling. The approach
includes a detailed model of functional test operations characterized
by fault coverage, false positives, and defects introduced in test, in
addition to rework and diagnosis (diagnostic test) operations that have
variable success rates and their own defect introduction mechanisms.
The model accommodates multiple rework attempts as well as coupling
between fault coverage and test cost and between rework success rate
and rework cost.
The new model has been implemented within a framework for
optimizing the location(s) and characteristics (fault coverage/test
cost, rework success rate/rework cost) of test/diagnosis/rework
operations in a general manufacturing process. A new search algorithm
called Waiting Sequence Search (WSS) is applied to traverse a general
process flow to perform the cumulative calculation of a yielded cost
objective function (yielded cost is the cumulative cost of a process
divided by the final product yield). Real-Coded Genetic Algorithms
(RCGAs) are used to perform a multi-objective optimization that
minimizes the yielded cost of the product. Examples of optimum
locations and characteristics of test/diagnosis/rework operations for
general complex process flows has been demonstrated.
To obtain more information on the test/diagnosis/rework economics optimization work conducted at CALCE EPSC, please contact Dr. Peter Sandborn at (301) 405-3167.
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CALCE Electronics Products and Systems Center is pursuing research
in the area of low temperature electronics on two fronts: (1)
Performance and reliability aspects of low temperature electronics to
-70°C and (2) Physics of failure (PoF) analysis for chip on board (COB)
packaging technology for low temperature, to -120°C with over 200°C
range temperature cycling applications.
The first focus area stems from the need for the OEMs in
avionics, networking, and communications to develop cost-effective
systems deploying the commercial-off-the-shelf components without
resorting to expensive and cumbersome methods like attaching heated
plates selectively on the PCB assemblies. Even though a significant
knowledge base exists on the low temperature physics of electronic
devices, it is not specific to the products used in an application.
Moreover, the OEMs are confronted with the problem of using the parts
rated for commercial range (0°C to 70°C) for availability and cost.
This research focus expands the knowledge base on the performance of
these parts at low temperatures through theoretical analysis and
experimental characterization. This knowledge base will help members in
their applications with respect to the deployment of commercial range
parts at low temperatures.
The second focus is in the area of PoF analysis of COB
technology for low temperature and large cyclic temperature range space
mission applications. In this effort, CALCE intends to identify key
failure mechanisms, characterize the packaging materials and interfaces
at low temperatures and develop and validate models to determine the
stress on interconnects and the chip.
With these efforts, CALCE EPSC intends to establish a center of
excellence for low temperature electronics research. For more
information, contact Dr. Sanka Ganesan at (301) 405-0765.
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Today’s semiconductor parts are most often specified for use in the
“commercial?0 to 70°C, and to a lesser extent in the “industrial?-40 to
85°C operating temperature ranges, thus satisfying the demands of the
dominant semiconductor consumers in the computer, telecommunications
and consumer electronics industries. Many organizations are
implementing uprating methodologies developed by the CALCE Center.
There is an interest in “pre-screening?parts for the level of risk
associated with uprating.
To address these needs CALCE EPSC has developed uprateability
risk assessment criteria and the methods for assigning the
uprateability risk levels to individual parts. The methodology includes
a focused data collection and analysis process that provides a
numerical risk level to each part that predicts the risk level involved
with uprating the part.
CALCE EPSC has performed a case study of this methodology on a
new fully automated digital engine controller under development by
Honeywell and characterized 519 parts from 44 different manufacturers.
CALCE EPSC is also able to match up suitable test laboratories with the
test needs for performing electrical testing.
For more information, contact Dr. Diganta Das at 301-405-7770.
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The open market philosophy of the past decade has led to a
revolutionary exchange of goods and services across the globe, as
companies aggressively search for those suppliers that provide the
greatest value at the lowest cost. The most well-known example of this
transformation is the transition of electronics manufacturing from the
United States, Europe and Japan to East Asia. A lesser-known
consequence of this change in philosophy has been the divesture of
operations that do not fall within a company’s area of expertise.
Examples include legal, accounting, design, and testing and analysis.
The motivation for outsourcing testing and analysis is clear.
Product performance and product qualification is increasingly addressed
and assured during the early stages of product development. Stricter
controls on supplier quality, greater dependence on statistical process
control, incorporation of design for reliability techniques, and use of
simulation software has resulted in less need for physical test and
analysis. In addition, extensive resources are often required to
maintain the skill set of the internal workforce and still may not
preserve corporate memory (loss of employees) or ensure access to the
required expertise. This reduction of internal facilities has led to
the rise of contract test laboratories and independent consultants.
The marketplace is increasingly global. Those companies that
dominate the global electronics marketplace, such as General Electric,
Agilent and Philips, are moving towards a distributed network of
problem-solvers to ensure rapid crisis resolution. These teams, who
communicate through email, conference calls, and WebEx, have a much
broader view of the world then previous generations and are motivated
to identify the expert, or experts, who are qualified to resolve their
problem, regardless of geographical location. Selection of contract
personnel with the appropriate experience allows companies to avoid
learning at the company’s expense and speeds up the introduction of
problem resolution.
Contract manufacturers are also realizing the need to have
access to these services, as system integrators and OEMs are increasing
their expectations of suppliers to validate product reliability and be
responsible for root-cause analysis. With the movement of manufacturing
to low-cost countries, but with test and analysis expertise remaining
in Europe/America/ Japan, more often this requires the contracting of
experts outside the local area, if not outside the entire country.
Performing test and analysis services for a worldwide customer
base requires a critical set of skills. The most important of these is
the ability to rapidly and accurately identify the problem and develop
effective corrective actions. Because of the remote location of the
parties involved, the test and analysis laboratory must be effectively
paperless. This allows for the rapid dissemination and revision of
quotations, test plans, along with draft and final reports. The
laboratory must have extended hours of operation past the traditional 8
to 5, especially when conference calls are required. Laboratory
personnel must also be flexible in regards to holidays, as national
days of rest may not be relevant to the customer’s country of origin.
CALCE Laboratory Services has been at the forefront of this
globalization of test and analysis. Customers have been located in
England, France, Germany, Mexico, Canada, Japan, U.S., Korea, Taiwan,
China, Hong Kong, Singapore, India and Israel. In addition to having
the capabilities listed previously, CALCE Laboratory Services has
benefited immensely from its placement within an academic environment.
The broad range of expertise among the CALCE EPSC faculty and degree of
knowledge and tools within the CALCE EPSC website can result in problem
identification within a matter of hours.
As the next-generation of product release and production
becomes increasingly time-critical, the sign of a successful company
will not only include the traditional specialities of marketing and
cost control, but also the ability to globally partner with a contract
lab capable of resolving problems in a manner that prevents any delay
in time-to-market.
Contact Dr. Michael Osterman for further information.
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Can you name the greatest change to your electronic product over the
past two years? Even with continued improvements in clock speed and
transistor density, microprocessors still tend to be fabricated with
standard processes and legacy materials. Connectors are evolving but
are primarily based upon previous designs. And the overwhelming numbers
of boards continue to be fabricated with either CEM-1 or FR-4 and
plated through hole technology. The greatest change has come from the
most ubiquitous of parts, the ceramic chip capacitor.
Over the past two years, all ceramic capacitor manufacturers
have transitioned from palladium-silver alloy electrodes to base metal
electrode (BME) technology. The driver for the move has been the high
cost of palladium and the need for constant price reductions. First
introduced in the mid-1990s, BME capacitors are soon expected to
capture over 80% of the market. It will soon be difficult to impossible
to acquire palladium-silver electrodes for certain classes of
dielectric, such as the Y5V.
Because of low margins and reliance on industry standards, most
testing of BME capacitors has been based upon JEDEC and military
standards. Failure to incorporate a physics-of-failure (PoF) approach
to product qualification can result in new failure modes escaping
detection. This may be the case with BME capacitors, as a new failure
mechanism has been reported during field testing. Unpowered capacitors
experienced cracking when exposed to high humidity (>85% relative
humidity) at near room temperature over the time span of weeks to
months. This failure mechanism was relatively insensitive to
temperature, and therefore the standard failure models and the
acceleration factors no longer apply.
Testing is currently underway at CALCE EPSC to characterize
this failure mechanism. Testing will consist of both palladium-silver
and BME capacitors at various temperatures and humidities. Capacitance
will be monitored in real-time to provide more rapid identification of
failure initiation. Crack morphology and location soon after initiation
may provide critical information on root-cause. Additional
characterization, including diffusion experimentation and compositional
analysis using spectroscopy, will be the foundation for the development
of a PoF-based failure model.
For more information, contact Dr. Michael Osterman at (301) 405-8023.
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Polymeric mold compounds absorb moisture, and thus swell, when
exposed to a humid environment. Hygroscopic stresses arise in plastic
encapsulated microcircuits (PEMs) when the mold compound swells and the
lead frame, die paddle, and semiconductor chip do not swell.
A new experimental procedure to measure hygroscopic swelling was reported in the Spring 2003 issue of CALCE News.
The procedure utilizes a real-time whole-field displacement measurement
technique called moir?interferometry to conduct extremely accurate
measurements. The results showed that hygroscopic swelling effects can
have a significant impact on PEM reliability. This issue has been
investigated quantitatively.
A plastic quad flat package (PQFP) was selected for the test.
The package was prepared as shown in Figure (1a) to investigate the
interaction between the mold compound and the chip. After the existing
moisture was removed by baking at 125°C, the specimen grating was
replicated onto the package surface at 85°C.
The package specimen was first cooled to 25°C and the
resulting thermal deformations were measured. The fringe patterns are
shown in Figure (1b) (contraction induced by DT of -60°C), which
represent in-plane displacement maps with a contour interval of 0.417
mm. The package was then subjected to 85ºC/85%RH until saturation state
was achieved. The package was installed in the real-time moir?system
and the deformations caused by hygroscopic swelling at the saturation
state were measured. The results are shown in Figure (1c) (expansion
caused by moisture absorption). This measurement was made at the
grating replication temperature (85°C) and thus the fringe patterns
shown in Figure (1c) represent deformations induced only by hygroscopic
swelling and do not contain any thermally induced deformations.
The displacement fields shown in Figure (1) represent the total
deformation of the package, which include the free thermal (b) and the
free hygroscopic (c) part of the deformation and the stress-induced
part of the deformation. Mathematically, the total strain of the
package is:
where ε T is a total strain, ε f is the free expansion/contraction part of strain, ε σ is a the stress-induced part of the strain, ΔT is a temperature excursion, α is the CTE in ppm/°C, C is the moisture content percentage, and β is the coefficient of hygroscopic swelling (CHS) in (%εh/%C). The subscript of α and β denote the cases of thermal deformation and hygroscopic deformation, respectively.
The values of α and β of the mold compound were determined from
the regions sufficiently far away from the chip, where the deformations
represent only ε f of the mold compound. Then the stress-induced strains (εx)
of the mold compound at the chip/mold compound interface were
calculated using the above equations. The results are summarized in
Table (1).
At the chip/mold compound interface, the stress-induced strain caused by hygroscopic swelling,  was nearly twice as large as that produced by the CTE mismatch,  , with ΔT of -60°C. Although the magnitude of is
not large, a significant strain gradient and thus a large stress
gradient at the interface arises, since the strain of the chip is
virtually zero.
It is well known that temperature changes and thermal
expansion mismatches can cause stresses and deformations that can lead
to reliability problems in PEMs. The experimental evidence here
indicates that hygroscopic stresses can also have a significant impact
on PEM reliability. In fact, this study shows that the hygroscopic
swelling induced deformations can be even larger than thermally induced
deformations in some packages. Numerical analysis has been used
extensively to assess reliability of microelectronic devices. The
analysis must include predictive capabilities of hygroscopic swelling
if there are changes in relative humidity in the field condition. For
more information, contact Dr. Bongtae Han at (301) 405-5255.
Figure 1(a) Schematic of the PQFP strip specimen, and moir?fringes-U or
x field (top) and V or y field (bottom)-fringes resulting from (b) a
thermal excursion of 60°C and (c) moisture absorption at the virtual
equilibrium state
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In today’s competitive world better production is of paramount
importance to a company’s survival. The corporate image is reflected in
the quality of a company’s product. Numerous studies have shown the
central role quality plays in increasing market share and improving
profitability. Six Sigma is a quality discipline that focuses on
product and service excellence to create a culture that demands
perfection. The first step to implement the Six Sigma system in an
organization is to spread a quality culture by training employees.
CALCE Electronic Product and Systems Center has developed
customized Six Sigma Green Belt and Black Belt training material for
Celestica, a leading electronics manufacturing services provider.
Celestica is implementing Six Sigma throughout its worldwide
organization to improve quality and efficiency by leveraging the tools
and techniques of Six Sigma (Define, Measure, Analyze, Improve and
Control). CALCE material and associated training tools are a key
element in making the training process scientific, up-to-date and
challenging. For more information contact Dr. Diganta Das at (301) 405-7770.
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Prof. Peter Sandborn of CALCE EPSC and Pameet Singh, a CALCE Ph.D.
student, received the invention of the year award in information
science for the development of a new methodology for determining the
optimum design refresh (redesign) schedule and strategy for long-life
electronic systems based on future production projections, maintenance
requirements and parts obsolescence forecasts. The methodology, called
Mitigation of Obsolescence Cost Analysis, or MOCA, is the first of its
type for parts-obsolescence-driven refresh scheduling and optimization.
The University of Maryland’s Office of Technology Commercialization
selected the CALCE MOCA software tool as its Invention of the Year for
2002 in the information science category.
MOCA is a design tool for determining the part obsolescence
impact on life cycle sustainment costs for the long field life
electronic systems based on future production projections, maintenance
requirements and part obsolescence forecasts. Based on a detailed cost
analysis model, MOCA determines the optimum design refresh plan during
the field-support-life of the product. The design refresh plan consists
of the number of design refresh activities, their respective calendar
dates and content to minimize the life cycle sustainment cost of the
product. The methodology supports user determined short- and long-term
obsolescence mitigation approaches on a per part basis, variable
look-ahead times associated with design refreshes, and it allows for
inputs to be specified as probability distributions that can vary with
time. Outputs from this analysis can optionally be used as inputs to
the PRICE Systems PRICE H/L commercial software tools for predicting
life cycle costs of systems.
For more information on and availability of the (MOCA) software tool, please contact Prof. Peter Sandborn at (301) 405-3167.
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Version 1.3 of the CALCE MOCA (Mitigation of Obsolescence Cost
Analysis) tool was released on June 9, 2003 with a complete set of new
documentation. Significant enhancements in MOCA for version 1.3 include
hierarchical analysis to arbitrary depth (capability to analyze systems
composed of many “boxes,?“boards,?and “components,?arranged in an
arbitrary number of hierarchical levels). MOCA 1.3 includes expanded
design refresh reports that include part inventories at design refresh
events and sustainment cost breakdowns. New obsolescence mitigation
planning models are also available in MOCA 1.3, including models that
allow mitigation approach application to be tied to fixed calendar
dates or to be referenced to the amount of time until the next design
refresh. Integrations with Frontier Technologies?ICE tool, Titan
Systems Poet environment and calcePWA bills of materials are supported.
The new MOCA 1.3 documentation includes explicit information on
every field, table, button, and menu item in the MOCA tool and
appendices documenting MOCA algorithms.
For more information on and availability of the MOCA software tool, please contact Prof. Peter Sandborn at (301) 405-3167.
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Nisene Technology Group (formerly B&G International), the world
leader in decapsulator technology, has been a member of the CALCE
Consortium for more than 6 years. The company continues to support
CALCE with its comprehensive range of products, methodologies and
services that encompass all IC decapsulation requirements.
This year, Nisene Technology donated one of its new D Cap Delta d2i
dual acid decapsulators (worth approximately $40,000) to CALCE.
Advances in plastic packaging have resulted in complex packages
with very high interconnect densities. The requirements for package
opening become very stringent when such high densities are incorporated
into packages, such as micro BGAs and FPBGAs. This advanced piece of
equipment gives CALCE more flexibility in the analysis of complex
configurations, such as multi-die BGAs and Chip Scale Packages, which
pose unique problems since the encapsulant must be removed while
preserving the integrity of the die, bond pads, bond wires and
leadframe interconnects.
More information on the Nisene Technology Group Delta series can be
found at here.
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