Project Number: C01-11

Integral and Integrated Passives Web Book Update

Dr. Sandborn sandborn@calce.umd.edu
Bevin Etienne bevrocks@eng.umd.edu

Objectives Background Approach

Objectives

Complete an updated review of state-of-the-art integral and integrated passive technologies. Compare size, cost, and performance for systems constructed with and without integral or integrated passive components (resistors and capacitors). Develop guidelines for determining when and how it makes sense to include integral and/or integrated passives within a system (i.e., what system characteristics, if any, indicate the opportunity for cost savings through the use of integral or integrated passives).

Specific objectives of the modeling portion of this project are to: (1) establish a model to compare the potential cost-savings of using embedded passives and take into account the cost-adders of using more complex interconnects, and (2) validate this cost-model using a Boeing-Anaheim supplied design as well as other selected industry suppliers.

Background

The use of discrete passive components (resistors, capacitors and inductors) in electronic systems has continued to increase even as the degree of system integration has increased. This trend not only requires more passives to be purchased and assembled to the system, but also suggests that discrete passives will consume increasing amounts of board area and assembly time. Passives that are fabricated within printed circuit boards (integral passives) are one approach that is being explored to address these trends. While integral passives will never replace all passive components, they provide a potential advantage for many applications including: increased circuit density through savings in board real-estate, decreased product size and weight, improved electrical properties through additional termination and filtering opportunities and shortening electrical connections, cost reduction through increasing manufacturing automation, increased product quality through the elimination of incorrectly attached devices, and improved reliability through eliminating solder joints.

In 1998, CALCE performed a review of integral passive technologies (C98-63). This review was then converted into a web-book (the C98-63 work did not address integrated passives). Significant advances in integral passive technology make it imperative to update the information developed in C98-63.

It is unclear whether, or under what circumstances, system costs can be decreased through the use of integral or integrated passives and what corresponding tradeoffs in system size and performance are available. Standard cost models compare the fixed integral passive area cost to the increasing SMT area cost to determine where increasing component densities make the use of integral passives cost effective. However, currently available models do not take into account a complex host of competing effects caused by requirements for interconnects with higher component and wiring densities.


Approach

We will begin this study by consulting with various board and material manufacturers to address the current methods by which integral passives are manufactured, tested, trimmed, and part quality and integrity are validated. The information received from manufacturers, along with information from applicable reference material and standards will be analyzed. The best practices followed by industry and a tradeoff analysis of discrete, integral, and integrated passive components will be presented. We will collaborate with the NIST ATP Advanced Embedded Passive program and the NEMI Passive Components Technology Working Group to study design tradeoffs for integral capacitors and resistors in laminate (PWB) substrates.

An application-specific analysis of the conversion of discrete passive components (resistors and capacitors) to integral passives that are embedded within a printed circuit board will be developed. The model will perform three basic analyses: 1) Board size analysis to determine board sizes, layer counts, and the number of boards that can be fabricated on a panel; 2) Panel fabrication cost modeling including a cost of ownership model for determining the impact of throughput changes associated with fabricating integral passive panels; and 3) Assembly modeling is used to determine the cost of assembling discrete components, and their associated inspection and rework.

Validation of the model using selected board designs, including those submitted by Boeing Anaheim, would also be evaluated using the analysis methodologies.


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